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74F182 Carry Lookahead Generator
April 1988 Revised July 1999
74F182 Carry Lookahead Generator
General Description
The 74F182 is a high-speed carry lookahead generator. It is generally used with the 74F181 or 74F381 4-bit arithmetic logic units to provide high-speed lookahead over word lengths of more than four bits.
Features
s Provides lookahead carries across a group of four ALUs s Multi-level lookahead high-speed arithmetic operation over long word lengths
Ordering Code:
Order Number 74F182SJ 74F182PC Package Number M16D N16E Package Description 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter "X" to the ordering code.
Logic Symbols
Connection Diagram
(c) 1999 Fairchild Semiconductor Corporation
DS009492
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74F182
Unit Loading/Fan Out
Pin Names Cn G0, G2 G1 G3 P0, P1 P2 P3 Cn+x - Cn+z G P Carry Input Carry Generate Inputs (Active LOW) Carry Generate Input (Active LOW) Carry Generate Input (Active LOW) Carry Propagate Inputs (Active LOW) Carry Propagate Input (Active LOW) Carry Propagate Input (Active LOW) Carry Outputs Carry Generate Output (Active LOW) Carry Propagate Output (Active LOW) Description U.L. HIGH/LOW 1.0/2.0 1.0/14.0 1.0/16.0 1.0/8.0 1.0/8.0 1.0/6.0 1.0/4.0 50/33.3 50/33.3 50/33.3 Input IIH/IIL Output IOH/IOL 20 A/-1.2 mA 20 A/-8.4 mA 20 A/-9.6 mA 20 A/-4.8 mA 20 A/-4.8 mA 20 A/-3.6 mA 20 A/-2.4 mA -1 mA/20 mA -1 mA/20 mA -1 mA/20 mA
Functional Description
The 74F182 carry lookahead generator accepts up to four pairs of Active LOW Carry Propagate (P0-P3) and Carry Generate (G0-G3) signals and an Active HIGH Carry input (Cn) and provides anticipated Active HIGH carries (Cn + x, Cn+y, Cn+z) across four groups of binary adders. The 74F182 also has Active LOW Carry Propagate (P) and Carry Generate (G) outputs which may be used for further levels of lookahead. The logic equations provided at the outputs are: Cn+x = G0 + P0 Cn Cn+y = G1 + P1 G0 + P1 P0 Cn Cn+z = G2 + P2 G1 + P2 P1 G0 + P2 P1 P0 Cn G = G3 + P3 G2 + P3 P2 G1 + P3 P2 P1 G0 P = P2 P2 P1 P0 Also, the 74F182 can be used with binary ALUs in an active LOW or active HIGH input operand mode. The connections (Figure 1) to and from the ALU to the carry lookahead generator are identical in both cases. Carries are rippled between lookahead blocks. The critical speed path follows the circled numbers. There are several possible arrangements for the carry interconnects, but all achieve about the same speed. A 28-bit ALU is formed by dropping the last 74F181 or 74F381.
*ALUs may be either 74F181 or 74F381
FIGURE 1. 32-Bit ALU with Rippled Carry between 16-Bit Lookahead ALUs
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74F182
Truth Table
Inputs Cn X L X H X X L X X H X X X L X X X H G0 H H L X X H H X L X X X H H X X L X X X X H X X X L H X X X L
H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial
Outputs G2 P2 G3 P3 Cn+x Cn+y Cn+z L L H H G P
P0 H X X L X H X X X L X X H X X X X L
G1
P1
H H H L X X X H H H X L X X X X H H X X L X
H X X X L L X H X X X X L L X X H X X X X L X H X X L H H H H L X X X X H H H X L X X H X X X X L L L X H X X X X L L X X H X L H H H H L X X X H X X X X L L L X X X H L
L L L H H H L L L L H H H H H H H H L L L L H H H H L
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74F182
Logic Diagram
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
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74F182
Absolute Maximum Ratings(Note 1)
Storage Temperature Ambient Temperature under Bias Junction Temperature under Bias VCC Pin Potential to Ground Pin Input Voltage (Note 2) Input Current (Note 2) Voltage Applied to Output in HIGH State (with VCC = 0V) Standard Output 3-STATE Output Current Applied to Output in LOW State (Max) ESD Last Passing Voltage (Min) twice the rated IOL (mA) 4000V -0.5V to VCC -0.5V to +5.5V -65C to +150C -55C to +125C -55C to +150C -0.5V to +7.0V -0.5V to +7.0V -30 mA to +5.0 mA
Recommended Operating Conditions
Free Air Ambient Temperature Supply Voltage 0C to +70C +4.5V to +5.5V
Note 1: Absolute maximum ratings are values beyond which the device may be damaged or have its useful life impaired. Functional operation under these conditions is not implied. Note 2: Either voltage limit or current limit is sufficient to protect inputs.
DC Electrical Characteristics
Symbol VIH VIL VCD VOH VOL IIH IBVI ICEX VID IOD IIL Parameter Input HIGH Voltage Input LOW Voltage Input Clamp Diode Voltage Output HIGH Voltage Output LOW Voltage Input HIGH Current Input HIGH Current Breakdown Test Output HIGH Leakage Current Input Leakage Test Output Leakage Circuit Current Input LOW Current 4.75 3.75 -1.2 -2.4 -3.6 -4.8 -8.4 -9.6 IOS ICCH ICCL Output Short-Circuit Current Power Supply Current Power Supply Current -60 18.4 23.5 -150 28.0 36.0 mA mA mA Max Max Max mA Max 10% VCC 5% VCC 10% VCC 2.5 2.7 0.5 5.0 7.0 50 Min 2.0 0.8 -1.2 Typ Max Units V V V V V A A A V A Min Min Min Max Max Max 0.0 0.0 VCC Conditions Recognized as a HIGH Signal Recognized as a LOW Signal IIN = -18 mA IOH = -1 mA IOH = -1 mA IOL = 20 mA VIN = 2.7V VIN = 7.0V VOUT = VCC IID = 1.9 A All Other Pins Grounded VIOD = 150 mV All Other Pins Grounded VIN = 0.5V (Cn) VIN = 0.5V (P3) VIN = 0.5V (P2) VIN = 0.5V (G3, P0, P1) VIN = 0.5V (G0, G2) VIN = 0.5V (G1) VOUT = 0V VO = HIGH VO = LOW
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74F182
AC Electrical Characteristics
TA = +25C Symbol Parameter Min tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL Propagation Delay Cn to Cn+x, Cn+y, Cn+z Propagation Delay P0, P1, or P2 to Cn+x, Cn+y, or Cn+z Propagation Delay G0, G1, or G2 to Cn+x, Cn+y, or Cn+z Propagation Delay P1, P2, or P3 to G Propagation Delay Gn to G Propagation Delay Pn to P 3.0 3.0 3.0 3.0 3.0 2.5 7.9 6.0 8.3 5.7 5.7 4.1 10.0 8.0 10.5 7.5 7.5 5.5 3.0 2.5 3.0 2.5 2.5 2.5 12.0 10.0 12.0 10.0 10.0 8.0 3.0 3.0 3.0 3.0 3.0 2.5 11.0 9.0 11.5 8.5 8.5 6.5 ns 2.5 1.5 6.5 3.9 8.5 5.2 2.5 1.0 11.0 7.0 2.5 1.5 9.5 6.0 ns 3.0 3.0 2.5 1.5 VCC = +5.0V CL = 50 pF Typ 6.6 6.8 6.2 3.7 Max 8.5 9.0 8.0 5.0 TA = -55C to +125C VCC = +5.0V CL = 50 pF Min 3.0 3.0 2.5 1.0 Max 12.0 11.0 11.0 7.0 TA = 0C to +70C VCC = +5.0V CL = 50 pF Min 3.0 3.0 2.5 1.5 Max 9.5 10.0 9.0 6.0 ns ns Units
ns
ns
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74F182
Physical Dimensions inches (millimeters) unless otherwise noted
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M16D
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74F182 Carry Lookahead Generator
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Package Number N16E
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. www.fairchildsemi.com 8 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com

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